creat by art - glass passivated junction chip - ideal for automated placement - super fast recovery time for high efficiency - built-in strain rellef - halogen-free according to iec 61249-2-21 definition molding compound, ul flammability classification rating 94v-0 base p/n with suffix "g" on packing code - green compound (halogen-free) base p/n with prefix "h" on packing code - aec-q101 qualified terminal: matte tin plated leads, solderable per jesd22-b102 meet jesd 201 class 1a whisker test with prefix "h" on packing code meet jesd 201 class 2 whisker test v rrm 50 100 150 200 300 400 500 600 v v rms 35 70 105 140 210 280 350 420 v v dc 50 100 150 200 300 400 500 600 v i f(av) a trr ns cj pf t j o c t stg o c document number: ds_d1405052 version:j14 - compliant to rohs directive 2011/65/eu and in accordance to weee 2002/96/ec mechanical data case: do-214ac (sma) do-214ac (sma) es1a thru es1j taiwan semiconductor surface mount su p er fast rectifiers features - moisture sensitivity level: level 1, per j-std-020 polarity: indicated by cathode band weight: 0.06 g (approximately) maximum ratings and electrical characterstics (t a =25 unless otherwise noted) parameter symbol es 1a es 1b es 1c es 1d es 1f es 1g es 1h es 1j unit maximum repetitive peak reverse voltage maximum rms voltage 18 o c/w maximum dc blocking voltage maximum average forward rectified current 1 peak forward surge current, 8.3 ms single half sine-wave superimposed on rated load i fsm 30 maximum reverse current @ rated vr t j =25 t j =100 i r a maximum instantaneous forward voltage (note 1) @ 1 a v f v 35 operating junction temperature range storage temperature range - 55 to +150 - 55 to +150 typical junction capacitance (note 3) typical thermal resistance r jl r ja 35 85 16 a note 2: reverse recovery test conditions: i f =0.5a, i r =1.0a, i rr =0.25a note 3: measured at 1 mhz and applied v r =4.0 volts note 1: pulse test with pw=300 s, 1% duty cycle 0.95 1.3 1.7 5 100 maximum reverse recovery time (note 2)
part no. part no. es1j es1j es1j (ta=25 unless otherwise noted) document number: ds_d1405052 version:j14 es1a thru es1j taiwan semiconductor ordering information aec-q101 qualified packing code green compound code package packing es1x (note 1) prefix "h" r3 suffix "g" sma 1,800 / 7" plastic reel r2 sma 7,500 / 13" paper reel m2 sma 7,500 / 13" plastic reel f3 folded sma 1,800 / 7" plastic reel f2 folded sma 7,500 / 13" paper reel f4 folded sma 7,500 / 13" plastic reel n/a e3 clip sma 1,800 / 7" plastic reel e2 clip sma 7,500 / 13" plastic reel note 1: "x" defines voltage from 50v (es1a) to 600v (es1j) example preferred p/n aec-q101 qualified packing code green compound code description es1j r3 r3 es1j r3g r3 g green compound ES1JHR3 h r3 aec-q101 qualified ratings and characteristics curves 0 0.2 0.4 0.6 0.8 1 1.2 80 90 100 110 120 130 140 150 average forward a current (a) lead temperature ( o c) fig.1 maximum forward current derating curve resister or inductive load 0 5 10 15 20 25 30 1 10 100 peak forward surge current (a) number of cycles at 60 hz fig. 3 maximum non-repetitive forward peak surge current 8.3ms single half sine wave (jedec method) 0.01 0.1 1 10 100 1000 0 20 40 60 80 100 120 140 instantaneous reverse current ( a) percent of rated peak reverse voltage (%) fig. 4 typical reverse characteristics tj=25 tj=125 tj=75 0.1 1 10 100 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 instantaneous forward current (a) forward voltage (v) fig. 2 typical instantaneous forward characteristics es1h-1j pulse width=300 s 1% duty cycle es1f-1g es1a-d
min max min max a 1.27 1.58 0.050 0.062 b 4.06 4.60 0.160 0.181 c 2.29 2.83 0.090 0.111 d 1.99 2.50 0.078 0.098 e 0.90 1.41 0.035 0.056 f 4.95 5.33 0.195 0.210 g 0.10 0.20 0.004 0.008 h 0.15 0.31 0.006 0.012 p/n = specific device code g = green compound yw = date code f = factory code document number: ds_d1405052 version:j14 es1a thru es1j taiwan semiconductor package outline dimensions dim. unit (mm) unit (inch) suggested pad layout symbol unit (mm) a1.68 b1.52 unit (inch) 0.066 0.060 0.155 0.095 0.215 marking diagram c3.93 d2.41 e5.45 1 10 100 0.1 1 10 100 junction capacitance (pf) reverse voltage (v) fig. 5 typical junction capacitance es1a-d es1f-j f=1.0mhz vsig=50mvp-p
creat by art assumes no responsibility or liability for any errors inaccuracies. information contained herein is intended to provide a product description only. no license, express or implied,to any intellectual property rights is granted by this document. except as provided in tsc's terms and conditions of sale for such products, tsc assumes no liability whatsoever, and disclaims any express or implied warranty, relating to sale and/or use of tsc products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right. the products shown herein are not designed for use in medical, life-saving, or life-sustaining applications. customers using or seling these products for use in such applications do so at their own risk and agree to fully indemnify tsc for any damages resulting from such improper use or sale. document number: ds_d1405052 version:j14 es1a thru es1j taiwan semiconductor notice specifications of the products displayed herein are subject to change without notice. tsc or anyone on its behalf,
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